## Wednesday, December 31, 2014

### Why is the Programming Resolution Supplemental Characteristic Listed as an Average?

Hello everyone!

Happy New Year!  This is our last post of 2014 so we wanted to wish all of our readers a Happy New Year.  Today I am going to talk about a question that I have been asked a few times lately.  In many of our power supplies, we list our Programming Resolution as an average number.  Many people want to know why we do it this way.

Look at the below snippet from our 664xA DC Power Supplies Supplemental Characteristics:

You can see that that it is clearly stated as an average.

The simple answer to this question is that this is because of calibration.

The more complex answer is that we use a DAC to control the output setting of the power supply.  A certain number of DAC counts is going to represent zero to full scale on the output of the supply.  For simplicity's sake, lets assume that we are using a 12 bit DAC for a power supply that goes to fifty volts.

In an ideal world where calibration is not necessary:
A 12 bit DAC gives us 2^12 or 4096 total counts.
The step size (programming resolution) of the 50 volt power supply would be 50/4096 or 0.0122 volts.

We do not live in an ideal world though so we have to disregard some DAC counts because of how the unit calibrates. We also generally let you program a little bit above the maximum settings (usually something like 2%).  Zero volts is not going to be zero DAC Counts and 50 V is not going to be 4096 DAC counts.  For our example, lets say that the minimum that we disregard 20 counts at the top and bottom (40 total counts) and the maximum we disregard is 120 counts (240 total counts) at the top and bottom.  In this scenario:

Minimum step size = 50/(4096-40) = 0.0123 V
Maximum step size = 50/(4096-120) = 0.0130 V

For our Supplemental Characteristic, we would take the average of those 2 numbers.   This gives us 0.01265 V.

The big question is how would I know what the programming resolution is for my particular unit.  I spent about half of yesterday trying to figure that out and I'm still working that out myself.  The best solution that I have right now is to hook a DMM to the output and slowly increment my output to see when it flips to a new setting.  I need to experiment on this though.  If any readers have a better idea, please let us know in the comments.  The fact of the matter is that the error is pretty small and to be safe, any error due to being in between DAC counts is included in our Programming Accuracy specification.

Well that is all for 2014. I hope that everyone has a safe and happy 2015.  See you next year!

Matt

## Tuesday, December 30, 2014

### Why does an electronic load draw a pulse of current when a voltage is initially applied?

The electronic loads have a snubber network across their input terminals. The snubber typically consists of a resistor in series with a capacitor. For example, the Keysight N3304A electronic load has 2.2 uF in series with about 2 ohms. The snubber network is there to maintain stability on the load input for all settings and operating modes. When the customer’s switch was closed, the initially discharged capacitor in the snubber pulled a pulse of current to begin charging. If the dV/dt of the load input voltage waveform was infinitely fast, the cap would initially look like a short and the initial current pulse would be limited by the resistor as I = V/R. In this example, the current pulse would have been 50 V / 2 ohms = 25 A. But he was seeing a much smaller current pulse: around 2.4 A instead of 25 A, but still higher than the expected set value of 1 A. This means the dV/dt was not infinite (the solid state switch had a finite risetime). In this case, the current pulse would be limited by the dV/dt of the input voltage waveform.

As an example, see Figure 1 below showing the input voltage and input current for an N3304A load. The voltage rises from 0 V to 50 V over about 75 us and the fastest part of the risetime is about 1V/us. Since I = C dV/dt, and for this electronic load, C = 2.2 uF, the peak of the current is calculated to be 2.2 uF x 1V/us = 2.2 A. The plot shows it to be about 2.4 A, so this is close to the expected peak value. As the dV/dt of the input voltage slows down, the current drops from its peak and approaches zero amps as the dV/dt slows to zero (horizontal). (Note that in the plot below, the load was set for zero current.)

So you can see that the current flowing into the input of an electronic load may not be simply the DC setting you expect. If you apply a dynamic voltage waveform to the input, the RC snubber network will also draw some current for a short time until the voltage applied to the load input stabilizes. There is another factor involved here that is worth mentioning but I will not cover in detail in this post since it is a secondary effect in this case. In this customer’s situation, the load was set for 1 A and initially had no voltage on it (his solid state switch was open). The load was trying to draw current by turning on its input FETs, but there was no voltage applied, so the load went to an unregulated state. When the voltage finally appeared (the solid state switch was closed), the FETs that were turned on hard had to recover and take a finite amount of time to begin regulating the set current. This effect can also contribute to brief, temporary unexpected current draw by the load when a voltage is suddenly applied to the input.

## Friday, December 12, 2014

### Why Does Over Current Protect (OCP) have a Programmable Delay Value in the First Place?

Since I am on a roll about over current protect (OCP), having just completed a two-part posting “Why does the response time of OCP vary on the power supply I am using and what can I do about it?” (Review part 1) (Review part 2) there is yet another aspect about OCP that is worth bringing up at this time. And that is “why does OCP have a programmable delay value in the first place?” This actually came up in a discussion with a colleague here after having read my part posting.

It may seem a bit ironic that OCP has a programmable delay in that in my posting on OCP I shared ideas on how one can minimize the response time delay encountered. But this is not contradictory. One may very well want to minimize it, eliminating extra delay being encountered, but not necessarily eliminate it altogether. As can be seen in my previous postings, I had programmed the OCP delay time to 5 ms.

The programmable OCP delay does serve a purpose, and that is to prevent false OCP trips. Adding some delay time prevents these false trips.  For someone who knows the root cause of false OCP tripping they might be half right. There are actually been two main causes of false OCP trips which are prevented by adding some delay time.

The original problem with OCP was that it would be falsely tripped when output voltage settings were changed on the power supply, due to capacitive loading at the test fixture or within the DUT. This is especially prominent with inrush current when first bringing up the voltage to power the DUT. An OCP delay prevents false triggering under these conditions. To correct the false tripping the delay would be invoked when output programming changes were made. As one example, the OCP delay description in our manual for our 663x series power supplies states:

This command sets the time between the programming of an output change that produces a constant
current condition (CC) and the recording of that condition by the Operation Status Condition register. The
delay prevents the momentary changes in status that can occur during reprogramming from being
registered as events by the status subsystem. Since the constant current condition is used to trigger
overcurrent protection (OCP), this command also delays OCP.”

Under this situation the momentary overcurrent is induced by the power supply. Although not nearly as much as in issue in practice, momentary overcurrents can also be DUT-induced as well. This is the second situation that can cause a false tripping of the OCP. The DUT may be independently turned on after the bias voltage has already been on and draw a surge of current. Or the DUT may change mode of operation and draw a temporary surge of current.  If the OCP delay is invoked only by an output programming change it does not have any effect in these situations.

On later generation products, such as our N6700, N6900, and N7900 series, the user also has the ability to programmatically select between having the OCP delay activate from either an output change, or from going into CC condition. This gives the user a way to remain consistent with original operation or have OCP delay effective for momentary DUT-induced overload currents as well!

## Friday, December 5, 2014

### Why does the response time of OCP vary on the power supply I am using and what can I do about it? Part 2

In the first part of this posting (click here to review) I highlighted what kind of response time is important for effective over current protection of typical DUTs and what the actual response characteristic is for a typical over current protect (OCP) system in a test system DC power supply. For reference I am including the example of OCP response time from the first part again, shown in Figure 1.

Figure 1: Example OCP system response time vs. overdrive level

Here in Figure 1 the response time of the OCP system of a Keysight N7951A 20V, 50A power supply was characterized using the companion 14585A software. It compares response times of 6A and 12A loading when the current limit is set to 5A. Including the programmed OCP delay time of 5 milliseconds it was found that the actual total response time was 7 milliseconds for 12A loading and 113 milliseconds for 6A loading.  As can be seen, for reasons previously explained, the response time clearly depends on the amount of overdrive beyond the current limit setting.

As the time to cause over current damage depends on the amount of current in excess of what the DUT can tolerate, with greater current causing damage more quickly, the slower response at lower overloads is generally not an issue.  If however you are still looking how you might further improve on OCP response speed for more effective protection, there are some things that you can do.

The first thing that can be done is to avoid using a power supply that has a full output current rating that is far greater than what the DUT actually draws. In this way the overdrive from an overload will be a greater percentage of the full output current rating. This will normally cause the current limit circuit to respond more quickly.

A second thing that can be done is to evaluate different models of power supplies to determine how quickly their various current limit circuits and OCP systems respond in based on your desired needs for protecting your DUT. For various reasons different models of power supplies will have different response times. As previously discussed in my first part, the slow response at low levels of overdrive is determined by the response of the current limit circuit.

One more alternative that can provide exceptionally fast response time is to have an OCP system that operates independently of a current limit circuit, much like how an over voltage protect (OVP) system works. Here the output level is simply compared against the protect level and, once exceeded, the power supply output is shut down to provide near-instantaneous protection. The problem here is this is not available on virtually any DC power supplies and would normally require building custom hardware that senses the fault condition and locally disconnects the output of the power supply from the DUT. However, one instance where it is possible to provide this kind of near-instantaneous over current protection is through the programmable signal routing system (i.e. programmable trigger system) in the Keysight N6900A and N7900A Advanced Power System (APS) DC power supplies. Configuring this triggering is illustrated in Figure 2.

Figure 2: Configuring a fast-acting OCP for the N6900A/N7900A Advanced Power System

In Figure 2 the N7909A software utility was used to graphically configure and download a fast-acting OCP level trigger into an N7951A Advanced Power System. Although this trigger is software defined it runs locally within the N7951A’s firmware at hardware speeds. The N7909A SW utility also generates the SCPI command set which can be incorporated into a test program.

Figure 3: Example custom-configured OCP system response time vs. overdrive level

Figure 3 captures the performance of this custom-configured OCP system running within the N7951A. As the OCP threshold and overdrive levels are the same this can be directly compared to the performance shown in Figure 1, using the conventional, current limit based OCP within the N7951A. A 5 millisecond OCP delay was included, as before. However, unlike before, there is now virtually no extra delay due to a current limit control circuit as the custom-configured OCP system is totally independent of it. Also, unlike before, it can now be seen the same fast response is achieved regardless of having just a small amount or a large amount of overdrive.

Because OCP systems rely on being initiated from the current limit control circuit, the OCP response time also includes the current limit response time. For most all over current protection needs this is usually plenty adequate.  If a faster-responding OCP is called for minimizing the size of the power supply and evaluating the performance of the OCP is beneficial. However, an OCP that operates independently of the current limit will ultimately be far faster responding, such as that which can be achieved either with custom hardware or making use of a programmable signal routing and triggering system like that found in the Keysight N6900A and N7900A Advanced Power Systems.